The performance of many embedded and networking workloads rely heavily on the architecture of the input/output (I/O) sub-systems. In modern processor architectures, several I/O devices may be connected to a processor via a data bus. In a virtualized environment, a processor can have multiple devices or multiple virtual functions assigned to different virtual machines. There are no mechanisms in place in modern general purpose architectures to limit the amount of I/O bandwidth a device or device function is allowed to consume. Without the ability to control how much of the I/O bandwidth a single device or device function may consume, it is possible for such a device or function to deprive other devices of I/O bandwidth and cause unpredictable delays in the processing of the workloads.